This invention relates to structures for interconnecting electronic devices such as semiconductor chips to higher level assemblies, typically circuit boards.
Connecting the devices to higher level assemblies has typically been accomplished by a set of leads, which on one end could be connected to a interconnection point on the periphery of the device, and on the other end could be connected to the higher level assembly. As devices were designed with increasing numbers of interconnection points on the devices, the interconnection points became smaller and closer together, and new methods were needed to provide the connection between the devices and higher level assemblies. One of these methods is known as tape automated bonding (TAB) in which the circuitry is formed on film similar to photographic film, and connected, as in previous methods of interconnection, to interconnection points on the periphery of the device.
Placing interconnection points on the periphery of a device, makes the circuitry in the device more complex. In an effort to simplify the circuitry of the devices, designers developed devices in which the interconnection points were over an entire surface of a device, rather than just at the periphery. In response to such devices, the so-called "Area TAB" technology was developed.
One of the drawbacks of area tab is the difficulty in routing the connection points on the interior of the device to a connection pad on the TAB tape frame. Thus a packaging method which allows connection points over the entire surface of the chip, but which allows the connection points to be conveniently connected to interconnect points on the periphery, is desirable.
A second method for maximizing the performance of electronic devices is to place more than one device in a single package, to form a so-called multi-chip package (MCP). MCPs, however, present a challenge of their own, among them dealing with differences in height and planarity between the devices, and providing interconnection between the devices.
A need, therefore, exists for providing apparatus and methods for providing electrical connection between connection points on the interior of a surface of a semiconductor device and higher level assemblies which provide for differences in height and planarity between devices and which provide interconnection between devices.